ASNT8133-KMC View full size
  • Wide input clock frequency range from DC to 50GHz
  • Selectable Forwarded, Divided-by-2, or Divided-by-4 output
  • 50% duty cycle of the divided clock signals 
  • Fully differential CML input interface
  • Fully differential CML output interface with 400mV single-ended swing
  • CMOS 3.3V control signals
  • Single +3.3V or -3.3V power supply
  • Power consumption: 845mW at full operational speed
  • Fabricated in SiGe for high performance, yield, and reliability
  • Custom CQFP 24-pin package

Function Operating Frequency Power, mW Package
Broadband Clock Divider by-1 / by-2 / by-4 DC-50 GHz 845 24-pin CQFP


Fig. 1 Functional Block Diagram

ASNT8133-KMC is a high-speed, low-power divider by-1, by-2, or by-4 with increased sensitivity. The part shown in Fig. 1 accepts a CML input clock signal cp/cn with the speed from DC to maximum operational frequency and provides a clean 50% duty cycle output signal cop/con with its frequency defined by the states of div and div4 control signals as shown in Table 1 within the part's datasheet. The part’s high-speed I/Os support the CML logic interface with on chip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS within the part's datasheet. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance.

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