ASNT2124-KMM


ASNT2124-KMM View full size
  • High speed broadband 1:4 Demultiplexer (DMUX)
  • Exhibits low jitter and limited temperature variation over industrial temperature range
  • Differential CML I/O data and clock buffers
  • Half-rate clock input (DDR mode)
  • External control of internal clock's duty cycle
  • Quarter-rate clock output
  • Single +3.3V or -3.3V power supply
  • Power consumption: 1.25W
  • Fabricated in SiGe for high performance, yield, and reliability
  • Custom CQFP 44-pin package

Function Operating Frequency Power, mW Package
Broadband Digital DDR 1:4 Demultiplexer w/ Duty Cycle Control DC-64 Gbps 1250 44-pin CQFP

DESCRIPTION

Fig. 1 Functional Block Diagram

ASNT2124-KMM is a low power and high-speed digital 1-to-4 deserializer-demultiplexer (DMUX) that functions seamlessly over data rates (fbit) ranging from DC to its maximum speed. The main function of the part is to demultiplex an incoming high speed serial differential CML data bit stream dp/dn running at a bit rate of fbit into 4 parallel data channels q0p/q0n, q1p/q1n, q2p/q2n, q3p/q3n running at a bit rate of fbit/4. Differential or single-ended half-rate clock cep/cen must be provided by an external source for the part to function properly. The duty cycle of the internal clock can be adjusted through analog ports dccp/dccn.

 

The parallel words and clock divided-by-4 c4op/c4on are transmitted through CML output interfaces. The clock and data outputs are phase-matched to each other resulting in a very little relative skew over the operating temperature range of the device. The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown within the ELECTRICAL CHARACTERISTICS section of the product data sheet. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance.

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