ASNT5116-KMM View full size
  • High speed broadband 2-channel D-Type Flip-Flop for data retiming with full rate clock
  • Sensitive input data buffer with increased CM range that is ideal for sampling applications
  • Input data single-ended common mode controls
  • Exhibits low jitter and limited temperature variation over industrial temperature range
  • 4ps set-up/hold time capability
  • 88% clock phase margin for retiming of data input eye
  • Fully differential CML input interfaces
  • Fully differential CML output interface with 400mV single-ended swing
  • Single +3.3V or -3.3V power supply
  • Power consumption: 1.01W
  • Fabricated in SiGe for high performance, yield, and reliability
  • Custom CQFP 44-pin package

Function Operating Frequency Power, mW Package
Linearized Dual D-Type Flip Flop with Increased Input Signal Sensitivity and Common Mode Level Adjustment DC-32 Gbps 1010 44-pin CQFP


Fig. 1 Functional Block Diagram

The temperature stable ASNT5116-KMM SiGe IC provides broadband data retiming functionality and is intended for use in high-speed measurement / test equipment. The IC shown in Fig. 1 can sample up to 32Gbps data signals d1p/d1n and d2p/d2n with up to 32GHz clock sources c1p/c1n and c2p/c2n to create 32Gbps retimed NRZ data outputs q1p/q1n and q2p/q2n. The data input buffers are designed to have increased input signal sensitivity and are able to operate over a wider range of input common mode (CM) voltages. The actual common mode voltage levels on data inputs d1p/d1n and d2p/d2n can be adjusted by applying voltages between vee and vcc to the corresponding control inputs dcin1p/dcin1n and dcin2p/dcin2n.


The part’s I/Os support the CML-type interface with on chip 50Ω termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. In the DC-coupling mode, the input signal's common-mode voltage should comply with the electrical characteristics section within the part's datasheet. In the AC-coupling mode, the input termination provides the required common-mode voltage automatically. The differential DC signaling mode is recommended for optimal performance, and it should be noted that control inputs dcin1p/dcin1n and dcin2p/dcin2n should always be connected to voltage sources to ensure correct 50Ω terminations for the data inputs.