ASNT5113-KMC View full size
  • High speed broadband D-Type Flip-Flop for data retiming with full rate clock
  • Additional input buffer / level shifter for improved protection
  • Sensitive input data buffer with increased CM range that is ideal for sampling applications
  • Input data single-ended common mode controls
  • Exhibits low jitter and limited temperature variation over industrial temperature range
  • 4ps set-up/hold time capability
  • 88% clock phase margin for retiming of data input eye
  • Fully differential CML input interfaces
  • Fully differential CML output interface with 400mV single-ended swing
  • Single +3.3V or -3.3V power supply
  • Power consumption: 510mW
  • Fabricated in SiGe for high performance, yield, and reliability
  • Custom CQFP 24-pin package

Function Operating Frequency Power, mW Package
D-Type Flip-Flop with Increased Input Signal Sensitivity, Common Mode Level Adjustment, and 30GHz Input Bandwidth DC-32 Gbps 510 24-pin CQFP


Fig. 1 Functional Block Diagram

The temperature stable ASNT5113-KMC SiGe IC provides broadband data retiming functionality and is intended for use in high-speed measurement / test equipment. The ASNT5113-KMC can sample a high-speed data signal dp/dn with a full-rate external clock cp/cn to create a full-rate retimed NRZ data output qp/qn. The data input buffer is designed to have increased input signal sensitivity, and is able to operate over a wider range of input common mode (CM) voltages. The actual common mode voltage levels at data inputs dp/dn can be adjusted by applying voltages between vee and vcc to the corresponding control inputs dcinp/dcinn.


The part’s I/Os support the CML-type interface with on chip 50Ω termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. In the DC-coupling mode, the input signal's common mode voltage should comply with specifications shown in the electrical characteristics table within the part's datasheet. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. It should be noted that the control inputs dcinp/dcinn should always be connected to voltage sources to ensure correct 50Ω terminations for the data inputs, and the differential DC signaling mode is recommended for optimal performance.