ASNT5106-KMC


ASNT5106-KMC View full size
  • Broadband tunable data/clock phase shifter
  • Manual control of power consumption / operational speed
  • 1GHz of bandwidth for the phase adjustment tuning port
  • Automatic temperature and process corner delay compensation with manual override
  • Duty cycle distortion compensation with adjustable gain
  • Manual internal peaking control
  • Fully differential CML input interface
  • Fully differential CML output interface
  • Single +3.3V or -3.3V power supply
  • Fabricated in SiGe for high performance, yield, and reliability
  • Custom CQFP 24-pin package

Function Operating Frequency Power, mW Package
Clock / Data Phase Shifter with 250ps Delay Variation DC-32Gbps / DC-26 GHz 1080-1450 24-pin CQFP

DESCRIPTION

Fig. 1 Functional Block Diagram

ASNT5106-KMC is a data/clock variable delay line with an advanced control system fabricated in SiGe technology. The IC shown in Fig. 1 provides an adjustable delay of its differential output signal outp/outn in relation to its broadband input signal inp/inn. The delay is controlled through a wide-band differential tuning port icntp/icntn. The chip incorporates an automatic common-mode offset cancellation circuit that operates with either clock signals or data signals with balanced patterns. In case of non-balanced data patterns, the circuit should be disabled through a control port fbcrl. The single-ended control port efcrl can be used to manipulate internal peaking in the delay block in order to adjust the part’s frequency response and thus improve output eye diagrams for various data rates and operating conditions. 

 

The part’s I/Os support the CML logic interface with on chip 50Ω termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. In the DC-coupling mode, the input signal's common mode voltage should comply with the specifications shown in the electrical characteristics section within the part's datasheet. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance.

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