Fig. 1 Functional Block Diagram
The ASNT_2MUX25 system on board integrates two identical 2:1 multiplexer blocks. Each MUX is used to double the incoming data rate by multiplexing two of the four input data channels. All four digital inputs have an operating frequency range from DC up to 22Gbps, resulting in the possibility to generate two differential output data streams with a rate up to 44Gbps. Input data can be applied single-ended/differentially, and AC/DC coupled to the inputs of each MUX. Two independent delay lines can correct the phase relationship between both data signals. On-board potentiometers allow for the individual adjustment of each data channel.
The clock input signal with a frequency from DC to 22GHzcan be applied single-ended/differentially, and AC/DC coupled. Amplifiers are used in both clock paths to optimize the duty cycle of the two multiplexed output data signals. The board also incorporates a programmable 1 to 256 divider (optional), operating up to 16.6GHz that can be used to generate a synchronization signal for monitoring the output data signals. The divider output is fully differential and supports the CML interface.
The multiplexer circuitry operates from a negative -3.3V power supply and consumes about 2.2A. A separate +3.0V power supply with a current consumption of about 600mA is required for the divider operation (if installed).