D-Type Flip Flop with Increased Input Signal Sensitivity

High speed broadband D-Type Flip-Flop for data retiming with full rate clock
Sensitive input data buffer with increased common-mode voltage range to support sampling applications
Exhibits low jitter and limited temperature variation over industrial temperature range
8ps set-up/hold time capability
89% clock phase margin for retiming of data input eye
Fully differential input interfaces
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Frequency (min): DC
Frequency (max): 17 Gbps
Power: 465 mW
Package: 24-pin QFN
Price: Request

Product Details


Fig. 1 Functional Block Diagram

The temperature stable ASNT5012-PQC SiGe IC provides broadband data retiming functionality and is intended for use in high-speed measurement / test equipment. ASNT5012-PQC can sample a high speed data signal dp/dn with the full-rate external clock cp/cn to create a full-rate retimed NRZ data output outp/outn. The data input buffer is designed to have increased input signal sensitivity and is able to operate over a wider range of input common mode (CM) voltages. The part’s I/Os support the CML logic interface with on chip 50Ω termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. It operates from a single +3.3V or -3.3V power supply.