Linearized D-Type Flip Flop with Increased Input Signal Sensitivity and Common Mode Level Adjustment

High speed broadband D-Type Flip-Flop for data retiming with full rate clock
Sensitive input data buffer with increased CM range that is ideal for sampling applications
Input data single-ended common mode controls
Exhibits low jitter and limited temperature variation over industrial temperature range
4ps set-up/hold time capability
88% clock phase margin for retiming of data input eye
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Frequency (min): DC
Frequency (max): 32 Gbps
Power: 530 mW
Package: 24-pin CQFP
Price: Request

Product Details


Fig. 1 Functional Block Diagram

The temperature stable ASNT5114-KMC SiGe IC provides broadband data retiming functionality and is intended for use in high-speed measurement / test equipment. The part can sample a high-speed data signal dp/dn with a full-rate external clock cp/cn to create a full-rate retimed NRZ data output qp/qn. The data input buffer is designed to have increased input signal sensitivity and is able to operate over a wider range of input common mode (CM) voltages. The actual common mode voltage levels on data inputs dp/dn can be adjusted by applying voltages between vee and vcc to the corresponding control inputs dcinp/dcinn.

The part’s I/Os support the CML-type interface with on chip 50Ω termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. In case of AC-coupled input data signals, the internal common mode voltage levels at the inputs of the input buffer are defined by on-chip resistive dividers. It should be noted that the control inputs dcinp/dcinn should always be connected to voltage sources to ensure correct 50Ω terminations for the data inputs.