Fig. 1 Functional Block Diagram
The temperature stable and broadband ASNT7112-PQB SiGe IC is a high-speed sample-and-hold amplifier. The IC shown in Fig. 1 performs sampling of an input differential analog signal using two internally-generated strobe signals s1 and s2, and delivers a step-like differential signal to the output. It features an adjustable track period length controlled by the t1crl and t2crl pins. This allows for maximizing the length of the valid output step.
The differential gain of the chip is approximately 0dB, which corresponds to the single-ended-to-differential gain of -6dB. The gain is adjustable using the control pin gaincrl. The chip supports both AC-coupled and DC-coupled inputs. In the DC-coupled mode, the input common-mode voltage must be equal to vcc for optimal performance of the chip. The input sampled data path includes an equalizer that increases the bandwidth of the chip. The level of equalization is controlled with the varcrl pin.
The output buffer features an independent supply voltage vccob which allows for the adjustment of the output signal’s common mode voltage. The part’s outputs support the CML-type logic interface with an on-chip 50Ω termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination. The differential DC signaling mode is recommended for optimal performance.